The following patchset adds address masks to existing perf hardware
breakpoint mechanism to allow trapping on an address range (currently
only single address) on supported architectures.
perf uapi is updated, x86 AMD implementation (for AMD Family 16h and
beyond) is provided, and perf tool has been extended to do:
$ perf stat -e mem:0x1000:w:0xf a.out
^^^
"don't care" bit mask
which will count writes to [0x1000 ~ 0x1010)
Jacob Shin (2):
perf: Add hardware breakpoint address mask
perf, x86: AMD implementation for hardware breakpoint address mask
Suravee Suthikulpanit (3):
perf tools: Add breakpoint address mask to the mem event parser
perf tools: Add breakpoint address mask syntax to perf list and
documentation
perf tools: Add breakpoint address mask test case to
tests/parse-events
arch/Kconfig | 4 ++++
arch/x86/Kconfig | 1 +
arch/x86/include/asm/cpufeature.h | 2 ++
arch/x86/include/asm/hw_breakpoint.h | 6 ++++++
arch/x86/include/asm/msr-index.h | 6 ++++++
arch/x86/include/asm/processor.h | 7 ++++++
arch/x86/kernel/cpu/amd.c | 21 ++++++++++++++++++
arch/x86/kernel/hw_breakpoint.c | 5 +++++
include/linux/hw_breakpoint.h | 6 ++++++
include/uapi/linux/perf_event.h | 5 ++++-
kernel/events/hw_breakpoint.c | 3 +++
tools/perf/Documentation/perf-record.txt | 14 ++++++++----
tools/perf/tests/parse-events.c | 34 ++++++++++++++++++++++++++++++
tools/perf/util/parse-events.c | 5 +++--
tools/perf/util/parse-events.h | 2 +-
tools/perf/util/parse-events.y | 14 ++++++++++--
16 files changed, 125 insertions(+), 10 deletions(-)
--
1.7.9.5
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