Now that the TTC driver has proper support for DT bindings, it is not
necessary for the registers to be mapped early. They will be mapped
during clock initialization using of_iomap(). Remove the early mapping.
In addition, remove the extraneous zynq_soc.h include from the timer
driver.
Signed-off-by: Josh Cartwright <josh.cartwri...@ni.com>
---
arch/arm/mach-zynq/common.c | 5 -----
arch/arm/mach-zynq/include/mach/zynq_soc.h | 6 +-----
arch/arm/mach-zynq/timer.c | 1 -
3 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 79bf5fb..2202f67 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -74,11 +74,6 @@ static void __init xilinx_irq_init(void)
static struct map_desc io_desc[] __initdata = {
{
- .virtual = TTC0_VIRT,
- .pfn = __phys_to_pfn(TTC0_PHYS),
- .length = TTC0_SIZE,
- .type = MT_DEVICE,
- }, {
.virtual = SCU_PERIPH_VIRT,
.pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
.length = SCU_PERIPH_SIZE,
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h
b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 5ebbd8e..2995044 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -29,13 +29,9 @@
#define UART_SIZE SZ_4K
#define UART_VIRT 0xF0001000
-#define TTC0_PHYS 0xF8001000
-#define TTC0_SIZE SZ_4K
-#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE)
-
#define SCU_PERIPH_PHYS 0xF8F00000
#define SCU_PERIPH_SIZE SZ_8K
-#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
+#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
# define LL_UART_PADDR UART1_PHYS
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index 9662306..de3df28 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -29,7 +29,6 @@
#include <linux/slab.h>
#include <linux/clk-provider.h>
-#include <mach/zynq_soc.h>
#include "common.h"
/*
--
1.8.0
--
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