On Thu, Oct 25, 2012 at 04:58:39PM +0200, Oleg Nesterov wrote: > On 10/16, Rabin Vincent wrote: > > > > 2012/10/15 Oleg Nesterov <o...@redhat.com>: > > > On 10/14, Rabin Vincent wrote: > > >> Flush the cache so that the instructions written to the XOL area are > > >> visible. > > >> > > >> Signed-off-by: Rabin Vincent <ra...@rab.in> > > >> --- > > >> kernel/events/uprobes.c | 1 + > > >> 1 file changed, 1 insertion(+) > > >> > > >> diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c > > >> index ca000a9..8c52f93 100644 > > >> --- a/kernel/events/uprobes.c > > >> +++ b/kernel/events/uprobes.c > > >> @@ -1246,6 +1246,7 @@ static unsigned long xol_get_insn_slot(struct > > >> uprobe *uprobe, unsigned long slot > > >> offset = current->utask->xol_vaddr & ~PAGE_MASK; > > >> vaddr = kmap_atomic(area->page); > > >> arch_uprobe_xol_copy(&uprobe->arch, vaddr + offset); > > >> + flush_dcache_page(area->page); > > >> kunmap_atomic(vaddr); > > > > > > I agree... but why under kmap_atomic? > > > > No real reason; I'll move it to after the unmap. > > OK. I assume you will send v2. > > But this patch looks like a bugfix, flush_dcache_page() is not a nop > on powerpc. So perhaps we should apply this fix right now?
Starting Power5, all Power processers have coherent caches. > OTOH, I do not understand this stuff, everything is nop on x86. And > when I look into Documentation/cachetlb.txt I am starting to think > that may be this needs flush_icache_user_range instead? > > Rabin, Ananth could you clarify this? Yes. We need flush_icache_user_range(). Though for x86 its always been a nop, one never knows if there is some Power4 or older machine out there that is still being used. We are fine for Power5 and later. Ananth -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
