Set up the wlan clock tree for Tegra20 and Tegra30.

Signed-off-by: Wei Ni <w...@nvidia.com>
---
 arch/arm/mach-tegra/board-dt-tegra20.c |    4 ++++
 arch/arm/mach-tegra/board-dt-tegra30.c |    4 ++++
 2 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c 
b/arch/arm/mach-tegra/board-dt-tegra20.c
index c339444..d24467a 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -103,8 +103,12 @@ static __initdata struct tegra_clk_init_table 
tegra_dt_clk_init_table[] = {
        { "pll_a",      "pll_p_out1",   56448000,       true },
        { "pll_a_out0", "pll_a",        11289600,       true },
        { "cdev1",      NULL,           0,              true },
+       { "blink",      "clk_32k",      32768,          true },
        { "i2s1",       "pll_a_out0",   11289600,       false},
        { "i2s2",       "pll_a_out0",   11289600,       false},
+       { "sdmmc1",     "pll_p",        48000000,       false},
+       { "sdmmc3",     "pll_p",        48000000,       false},
+       { "sdmmc4",     "pll_p",        48000000,       false},
        { NULL,         NULL,           0,              0},
 };
 
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c 
b/arch/arm/mach-tegra/board-dt-tegra30.c
index 53bf60f..3277d1e 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -61,11 +61,15 @@ static __initdata struct tegra_clk_init_table 
tegra_dt_clk_init_table[] = {
        { "pll_a_out0", "pll_a",        11289600,       true },
        { "extern1",    "pll_a_out0",   0,              true },
        { "clk_out_1",  "extern1",      0,              true },
+       { "blink",      "clk_32k",      32768,          true },
        { "i2s0",       "pll_a_out0",   11289600,       false},
        { "i2s1",       "pll_a_out0",   11289600,       false},
        { "i2s2",       "pll_a_out0",   11289600,       false},
        { "i2s3",       "pll_a_out0",   11289600,       false},
        { "i2s4",       "pll_a_out0",   11289600,       false},
+       { "sdmmc1",     "pll_p",        48000000,       false},
+       { "sdmmc3",     "pll_p",        48000000,       false},
+       { "sdmmc4",     "pll_p",        48000000,       false},
        { NULL,         NULL,           0,              0},
 };
 
-- 
1.7.1

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