On Fri, Sep 14, 2012 at 04:24:32PM +0000, Luck, Tony wrote: > > This is an unusual configuration but it's not unheard of. PPC64 in rare > > (and usually broken) configurations can have one node span another. Tony > > should know if such a configuration is normally allowed on Itanium or if > > this should be considered a platform bug. Tony? > > We definitely have platforms where the physical memory on node 0 > that we skipped to leave physical address space for PCI mem mapped > devices gets tagged back at the very top of memory, after other nodes. > > E.g. A 2-node system with 8G on each might look like this: > > 0-2G RAM on node 0 > 2G-4G PCI map space > 4G-8G RAM on node 0 > 8G-16GRAM on node 1 > 16G-18G RAM on node 0 > > Is this the situation that we are talking about? Or something different? >
This is the type of situation we are talking about. The spanned range of node 0 includes node 1. The patch needs another revision with a comment explaining the situation included but otherwise the patch should be fine. -- Mel Gorman SUSE Labs -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
