From: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
The Armada 370 and XP SoCs have configurable muxing for a certain
number of their pins, controlled through a pinctrl driver.
The 'compatible' property is defined in the SoC-specific .dtsi files,
since the compatible string identifies the number of pins and other
SoC-specific properties.
Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
Cc: Grant Likely <grant.lik...@secretlab.ca>
Cc: Rob Herring <rob.herr...@calxeda.com>
Cc: Rob Landley <r...@landley.net>
Cc: Russell King <li...@arm.linux.org.uk>
Cc: Linus Walleij <linus.wall...@linaro.org>
Cc: Lior Amsalem <al...@marvell.com>
Cc: Andrew Lunn <and...@lunn.ch>
Cc: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Cc: Ben Dooks <ben.do...@codethink.co.uk>
Cc: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
Cc: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Cc: devicetree-disc...@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
---
arch/arm/boot/dts/armada-370-xp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi
b/arch/arm/boot/dts/armada-370-xp.dtsi
index 6b6b932..7c72a70 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -63,6 +63,13 @@
reg = <0xd0020300 0x30>;
interrupts = <37>, <38>, <39>, <40>;
};
+
+ pinctrl@d0018000 {
+ reg = <0xd0018000 0x38>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
};
};
--
1.7.10.4
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