On Thu, Jul 26, 2012 at 02:45:52PM -0700, Kevin Hilman wrote: > Ideally, we will eventually have a representation that can map > from regulators all the way down to IP blocks. regulator --> voltage > domain --> power domain --> clock domain --> clocks --> IP block.
Well, often the clock bit is something of a noop - a lot of SoCs can reparent the IP block clocks between the different clock domains happily and have core clock domains that are mostly orthogonal to the power domains. But yes.
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