On Tue, 10 Jul 2012 23:54:02 +0800
Jiang Liu <liu...@gmail.com> wrote:

> From: Yijing Wang <wangyij...@huawei.com>
> 
> From: Yijing Wang <wangyij...@huawei.com>
> 
> Since PCI Express Capabilities Register is read only, cache its value
> into struct pci_dev to avoid repeatedly calling pci_read_config_*().
> 
> Signed-off-by: Yijing Wang <wangyij...@huawei.com>
> Signed-off-by: Jiang Liu <liu...@gmail.com>
> ---
>  drivers/pci/probe.c |    1 +
>  include/linux/pci.h |    1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index 6c143b4..65e82e3 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -929,6 +929,7 @@ void set_pcie_port_type(struct pci_dev *pdev)
>       pdev->is_pcie = 1;
>       pdev->pcie_cap = pos;
>       pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
> +     pdev->pcie_flags = reg16;
>       pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
>       pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
>       pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 5faa831..f4a7ad6 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -258,6 +258,7 @@ struct pci_dev {
>       u8              pcie_mpss:3;    /* PCI-E Max Payload Size Supported */
>       u8              rom_base_reg;   /* which config register controls the 
> ROM */
>       u8              pin;            /* which interrupt pin this device uses 
> */
> +     u16             pcie_flags;     /* cached PCI-E Capabilities Register */

 "xxx_flags" sounds like a bit flag. This variable stores a value of PCIe 
capability 
 register, doesn't it?   How about "pcie_cap_reg" ?

>  
>       struct pci_driver *driver;      /* which driver has allocated this 
> device */
>       u64             dma_mask;       /* Mask of the bits of bus address this
> -- 
> 1.7.9.5
> 
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> 


-- 
Taku Izumi <izumi.t...@jp.fujitsu.com>

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