On Wed, 15 Jul 2026 02:37:45 -0400, Esteban Urrutia wrote:
> This series adds support for the PCIe0 PHY found in the SM8475 SoC.
> The initialization sequence varies noticeably when compared to the one used
> in the SM8450 SoC, hence the need to add support for this PHY.
>
>
Applied, thanks!
[1/3] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add SM8475 QMP PHY
commit: bae047e91213a7b8f86b70f0f48f38374a73d5ea
[2/3] phy: qcom: qmp-pcie: Add pcs_lane1 offset to V5 offsets
commit: f8b4493d5e7e19682abcf538a9faad012b5ef69e
[3/3] phy: qcom: qmp-pcie: Add support for SM8475 Gen3x1 PCIe0 port
commit: 9e953732c3ed02b19698bf4af05396a3573681e1
Best regards,
--
~Vinod
