+Ben Hi Richard,
On 5/28/26 7:23 PM, Richard Cheng wrote: > cl_flush() and sb() in fill_buf.c only have implementations for i386 > and x86_64, so on aarch64 both compile to empty functions. mem_flush() > then walks the buffer calling a no-op cl_flush() per cache line and > finishes with a no-op sb(), leaving any caller that expects a flushed > buffer (e.g. CMT, L3_CAT) operating on unflushed state with no warning. > > Add an aarch64 code block using the ARM equivalents: > * "dc civac, %0" for cl_flush() > * "dsb sy" for sb() Calling on Arm experts here since my superficial check found sfence to be used for __wmb() on x86 and the Arm equivalent per arch/arm64/include/asm/barrier.h appears to be "dsb st"? Even so, it looks like the changes below were considered by Ben during a previous submission but I am not able to tell if his feedback was taken into account here. Please see: https://lore.kernel.org/lkml/[email protected]/ https://lore.kernel.org/lkml/[email protected]/ > > Both instructions are EL0-accessible on Linux aarch64. > > Signed-off-by: Richard Cheng <[email protected]> > --- > tools/testing/selftests/resctrl/fill_buf.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/tools/testing/selftests/resctrl/fill_buf.c > b/tools/testing/selftests/resctrl/fill_buf.c > index 19a01a52dc1a..a41d21e5a64e 100644 > --- a/tools/testing/selftests/resctrl/fill_buf.c > +++ b/tools/testing/selftests/resctrl/fill_buf.c > @@ -27,6 +27,9 @@ static void sb(void) > #if defined(__i386) || defined(__x86_64) > asm volatile("sfence\n\t" > : : : "memory"); > +#elif defined(__aarch64__) > + asm volatile("dsb sy\n\t" > + : : : "memory"); > #endif > } > > @@ -35,6 +38,9 @@ static void cl_flush(void *p) > #if defined(__i386) || defined(__x86_64) > asm volatile("clflush (%0)\n\t" > : : "r"(p) : "memory"); > +#elif defined(__aarch64__) > + asm volatile("dc civac, %0\n\t" > + : : "r"(p) : "memory"); > #endif > } > Reinette
