In FPGA Development boards with GPIOs we use the opencores gpio verilog
rtl. This is compatible with the gpio-mmio. Add the compatible string
to allow as below.
Example:
gpio0: gpio@91000000 {
compatible = "opencores,gpio", "brcm,bcm6345-gpio";
reg = <0x91000000 0x1>, <0x91000001 0x1>;
reg-names = "dat", "dirout";
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
Link: https://opencores.org/projects/gpio
Signed-off-by: Stafford Horne <[email protected]>
---
Documentation/devicetree/bindings/gpio/gpio-mmio.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
index b4d55bf6a285..0490580df19e 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
@@ -23,6 +23,7 @@ properties:
- ni,169445-nand-gpio
- wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller
- intel,ixp4xx-expansion-bus-mmio-gpio
+ - opencores,gpio
big-endian: true
--
2.51.0
