On 25/11/2025 09:46, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > On Fri, Nov 21, 2025 at 02:21:56PM +0000, Valentina Fernandez wrote: >> Microchip family of RISC-V SoCs typically have one or more application >> clusters. These clusters can be configured to run in an Asymmetric >> Multi Processing (AMP) mode. >> >> Add a dt-binding for these application clusters. >> >> Signed-off-by: Valentina Fernandez <[email protected]> >> --- >> .../microchip,ipc-sbi-remoteproc.yaml | 95 +++++++++++++++++++ >> 1 file changed, 95 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi-remoteproc.yaml >> >> diff --git >> a/Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi-remoteproc.yaml >> >> b/Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi-remoteproc.yaml >> new file mode 100644 >> index 000000000000..348902f9a202 >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/remoteproc/microchip,ipc-sbi-remoteproc.yaml >> @@ -0,0 +1,95 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: >> http://devicetree.org/schemas/remoteproc/microchip,ipc-sbi-remoteproc.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Microchip IPC Remote Processor >> + >> +description: >> + Microchip family of RISC-V SoCs typically have one or more >> + clusters. These clusters can be configured to run in an Asymmetric >> + Multi Processing (AMP) mode where clusters are split in independent >> + software contexts. >> + >> +maintainers: >> + - Valentina Fernandez <[email protected]> >> + >> +properties: >> + compatible: >> + const: microchip,ipc-sbi-remoteproc > This should be SoC specific compatible. There was some discussion on this in v1: https://lore.kernel.org/all/20241015-distrust-chatty-9e723e670fef@spud/
The compatible is intentionally generic, representing a “generic” SBI ecall interface to a set of remote processors, with the platform abstracted via SBI ecalls. The IPC/IHC (named differently depending on whether it is RTL for the FPGA fabric or a hardened version) is intended for Asymmetric Multiprocessing, where a set of cores can run other firmware, such as Zephyr. Unlike platforms with a fixed DSP, the configuration here is variable even for a single SoC. For example, which memory regions are used for the remote cluster or which mailbox channel is selected. Because the configuration can vary even on the same SoC, adding a SOC-specific compatible string provides no additional clarity, as it does not correspond to a unique configuration. That said, if SOC-specific compatible strings are needed, I can add them. Thanks, Valentina > > Best regards, > Krzysztof >
