From: Kyle Deng <quic_chunk...@quicinc.com>

The Shared Memory Point to Point (SMP2P) protocol facilitates
communication of a single 32-bit value between two processors.
Add these two nodes for remoteproc enablement on QCS615 SoC.

Signed-off-by: Kyle Deng <quic_chunk...@quicinc.com>
Signed-off-by: Lijuan Gao <quic_liju...@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs615.dtsi | 79 ++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi 
b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index edfb796d8dd3..ab3c6ba5842b 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -332,6 +332,80 @@ mc_virt: interconnect-2 {
                qcom,bcm-voters = <&apps_bcm_voter>;
        };
 
+       qcom,smp2p-adsp {
+               compatible = "qcom,smp2p";
+               qcom,smem = <443>, <429>;
+               interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
+               mboxes = <&apss_shared 26>;
+               qcom,ipc = <&apcs 0 26>;
+               qcom,local-pid = <0>;
+               qcom,remote-pid = <2>;
+
+               adsp_smp2p_out: master-kernel {
+                       qcom,entry-name = "master-kernel";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               adsp_smp2p_in: slave-kernel {
+                       qcom,entry-name = "slave-kernel";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               sleepstate_smp2p_out: sleepstate-out {
+                       qcom,entry-name = "sleepstate";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               sleepstate_smp2p_in: qcom,sleepstate-in {
+                       qcom,entry-name = "sleepstate_see";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+               smp2p_rdbg2_out: qcom,smp2p-rdbg2-out {
+                       qcom,entry-name = "rdbg";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               smp2p_rdbg2_in: qcom,smp2p-rdbg2-in {
+                       qcom,entry-name = "rdbg";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+
+       qcom,smp2p-cdsp {
+               compatible = "qcom,smp2p";
+               qcom,smem = <94>, <432>;
+               interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
+               mboxes = <&apss_shared 6>;
+               qcom,ipc = <&apcs 0 6>;
+               qcom,local-pid = <0>;
+               qcom,remote-pid = <5>;
+
+               cdsp_smp2p_out: master-kernel {
+                       qcom,entry-name = "master-kernel";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               cdsp_smp2p_in: slave-kernel {
+                       qcom,entry-name = "slave-kernel";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               smp2p_rdbg5_out: qcom,smp2p-rdbg5-out {
+                       qcom,entry-name = "rdbg";
+                       #qcom,smem-state-cells = <1>;
+               };
+
+               smp2p_rdbg5_in: qcom,smp2p-rdbg5-in {
+                       qcom,entry-name = "rdbg";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+       };
+
        qup_opp_table: opp-table-qup {
                compatible = "operating-points-v2";
                opp-shared;
@@ -3337,6 +3411,11 @@ apss_shared: mailbox@17c00000 {
                        #mbox-cells = <1>;
                };
 
+               apcs: syscon@17c0000c {
+                       compatible = "syscon";
+                       reg = <0x0 0x17c0000c 0x0 0x4>;
+               };
+
                watchdog: watchdog@17c10000 {
                        compatible = "qcom,apss-wdt-qcs615", "qcom,kpss-wdt";
                        reg = <0x0 0x17c10000 0x0 0x1000>;

-- 
2.46.0


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