Extend SAVIC test include MSI injection from host.
Test scenarios where MSI vector is not allowed by
guest in ALLOWED_IRR and when it is allowed.

Signed-off-by: Neeraj Upadhyay <neeraj.upadh...@amd.com>
---
 tools/testing/selftests/kvm/x86/savic_test.c | 49 ++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/tools/testing/selftests/kvm/x86/savic_test.c 
b/tools/testing/selftests/kvm/x86/savic_test.c
index 277ee18a0cbd..edb355e9df42 100644
--- a/tools/testing/selftests/kvm/x86/savic_test.c
+++ b/tools/testing/selftests/kvm/x86/savic_test.c
@@ -22,6 +22,7 @@
 #define IOAPIC_NUM_LEVEL_VECTORS 2
 #define RTC_GSI        8
 #define RTC_GSI_IRQ 0x85
+#define MSI_VECTOR 0x40
 #define FIXED_IPI_VEC     0x31
 #define FIXED_LOGICAL_IPI_VEC     0x32
 #define BROADCAST_ALL_IPI_VEC     0x33
@@ -46,6 +47,7 @@ enum savic_test_state {
        SAVIC_TEST_STATE(SAVIC_IDLE_HALT),
        SAVIC_TEST_STATE(SAVIC_IOAPIC),
        SAVIC_TEST_STATE(SAVIC_IOAPIC2),
+       SAVIC_TEST_STATE(SAVIC_MSI),
        SAVIC_TEST_STATE(SAVIC_IPI),
        SAVIC_TEST_STATE(SAVIC_NMI),
        SAVIC_TEST_STATE(SAVIC_NMI2),
@@ -135,6 +137,7 @@ struct test_data_page {
        uint64_t ioapic_lirq1_count;
        uint64_t ioapic_lirq2_count;
        uint64_t ioapic_rtc_gsi_irq_count;
+       uint64_t msi_irq_count;
        uint64_t fixed_phys_ipi_wake_count;
        uint64_t fixed_phys_ipi_hlt_count;
        uint64_t fixed_logical_ipi_hlt_count;
@@ -1064,6 +1067,34 @@ static void guest_nmi_handler(struct ex_regs *regs)
                sev_es_nmi_complete();
 }
 
+static void savic_msi_not_allowed(int id)
+{
+       struct test_data_page *data = get_test_data();
+
+       savic_allow_vector(MSI_VECTOR);
+
+       __GUEST_ASSERT(READ_ONCE(data->msi_irq_count) == 0,
+                       "Invalid MSI IRQ count: %ld, should be 0",
+                       READ_ONCE(data->msi_irq_count));
+}
+
+static void savic_msi_allowed(int id)
+{
+       struct test_data_page *data = get_test_data();
+
+       __GUEST_ASSERT(READ_ONCE(data->msi_irq_count) == 1,
+                       "Invalid MSI IRQ count: %ld",
+                       READ_ONCE(data->msi_irq_count));
+}
+
+static void msi_intr_handler(struct ex_regs *regs)
+{
+       struct test_data_page *data = get_test_data();
+
+        WRITE_ONCE(data->msi_irq_count, data->msi_irq_count + 1);
+        x2apic_write_reg(APIC_EOI, 0x00);
+}
+
 static void ipi_guest_code(int id)
 {
        struct test_data_page *data;
@@ -1164,6 +1195,9 @@ static void guest_code(int id)
        SAVIC_GUEST_SYNC(SAVIC_IOAPIC, savic_ioapic);
        SAVIC_GUEST_SYNC(SAVIC_IOAPIC2, savic_ioapic2);
 
+       SAVIC_GUEST_SYNC(SAVIC_MSI, savic_msi_not_allowed);
+       SAVIC_GUEST_SYNC(SAVIC_MSI, savic_msi_allowed);
+
        SAVIC_GUEST_SYNC(SAVIC_IPI, savic_ipi);
 
        /* Disable host NMI injection in control MSR. */
@@ -1313,6 +1347,17 @@ static void host_send_ioapic_irq(struct kvm_vm *vm, int 
id)
        }
 }
 
+static void host_send_msi(struct kvm_vm *vm)
+{
+       struct kvm_msi msi = {
+               .address_lo = 0,
+               .address_hi = 0,
+               .data = MSI_VECTOR,
+       };
+
+       __vm_ioctl(vm, KVM_SIGNAL_MSI, &msi);
+}
+
 static void host_send_nmi(int id)
 {
        vcpu_nmi(vcpus[id]);
@@ -1346,6 +1391,9 @@ static void host_test_savic(struct kvm_vm *vm, int id, 
enum savic_test_state tes
        case SAVIC_IOAPIC2_START:
                host_send_ioapic_irq(vm, id);
                break;
+       case SAVIC_MSI_START:
+               host_send_msi(vm);
+               break;
        case SAVIC_NMI_START:
        case SAVIC_NMI2_START:
        case SAVIC_NMI3_START:
@@ -1399,6 +1447,7 @@ static void install_exception_handlers(struct kvm_vm *vm)
        vm_install_exception_handler(vm, BROADCAST_NOSELF_IPI_VEC,
                        guest_broadcast_noself_ipi_handler);
        vm_install_exception_handler(vm, NMI_VECTOR, guest_nmi_handler);
+       vm_install_exception_handler(vm, MSI_VECTOR, msi_intr_handler);
 }
 
 int main(int argc, char *argv[])
-- 
2.34.1


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