Serial interface uart3 on phyFLEX board is capable of 5-wire connection
including signals RTS and CTS for hardware flow control.

Fix signals UART3_CTS_B and UART3_RTS_B padmux assignments and add
missing property "uart-has-rtscts" to allow serial interface to be
configured and used with the hardware flow control.

Signed-off-by: Primoz Fiser <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi 
b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index f28a96fcf23e..3f262e8ebf7f 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -316,8 +316,8 @@ pinctrl_uart3: uart3grp {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
                                MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
-                               MX6QDL_PAD_EIM_D30__UART3_RTS_B         0x1b0b1
-                               MX6QDL_PAD_EIM_D31__UART3_CTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_D31__UART3_RTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_D30__UART3_CTS_B         0x1b0b1
                        >;
                };
 
@@ -404,6 +404,7 @@ &reg_soc {
 &uart3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart3>;
+       uart-has-rtscts;
        status = "disabled";
 };
 
-- 
2.25.1

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