On 16/03/2021 10:22, Chunfeng Yun wrote:
> This is used to fix dtbs_check warning
>
> Signed-off-by: Chunfeng Yun <chunfeng....@mediatek.com>
Applied now to v5.12-next/dts32
> ---
> v2~v5: no changes
> ---
> arch/arm/boot/dts/mt7629.dtsi | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boot/dts/mt7629.dtsi
> index 5cbb3d244c75..874043f0490d 100644
> --- a/arch/arm/boot/dts/mt7629.dtsi
> +++ b/arch/arm/boot/dts/mt7629.dtsi
> @@ -329,8 +329,9 @@
> status = "disabled";
> };
>
> - u3phy0: usb-phy@1a0c4000 {
> - compatible = "mediatek,generic-tphy-v2";
> + u3phy0: t-phy@1a0c4000 {
> + compatible = "mediatek,mt7629-tphy",
> + "mediatek,generic-tphy-v2";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 0x1a0c4000 0xe00>;
> @@ -413,14 +414,15 @@
> };
> };
>
> - pciephy1: pcie-phy@1a14a000 {
> - compatible = "mediatek,generic-tphy-v2";
> + pciephy1: t-phy@1a14a000 {
> + compatible = "mediatek,mt7629-tphy",
> + "mediatek,generic-tphy-v2";
> #address-cells = <1>;
> #size-cells = <1>;
> ranges = <0 0x1a14a000 0x1000>;
> status = "disabled";
>
> - pcieport1: port1phy@0 {
> + pcieport1: pcie-phy@0 {
> reg = <0 0x1000>;
> clocks = <&clk20m>;
> clock-names = "ref";
>
