> Another thing about the PacDigi core: one has to be very careful > to avoid sequential accesses to sequential PCI locations when > programming the chip -- it cannot handle merged register writes. > > So for any group of sequentially laid out registers, the code has > to ensure it never writes two adjacent registers in sequence..
Ugh ? Write combining isn't permitted on normal registers afaik... Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
