Hi Konstantin,
On Wed, Feb 03 2021, kos...@marvell.com wrote:
> From: Konstantin Porotchkin <kos...@marvell.com>
>
> Add SDIO mode pin control configration for CP0 on A8K DB.
This patch does not touch the A8K DB device-tree file.
baruch
>
> Signed-off-by: Konstantin Porotchkin <kos...@marvell.com>
> ---
> arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++++++
> arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> index 293403a1a333..179218774ba9 100644
> --- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
> @@ -47,6 +47,12 @@
> cp0_pinctrl: pinctrl {
> compatible = "marvell,armada-7k-pinctrl";
>
> + sdhci_pins: sdhi-pins {
> + marvell,pins = "mpp56", "mpp57", "mpp58",
> + "mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
> +
> nand_pins: nand-pins {
> marvell,pins =
> "mpp15", "mpp16", "mpp17", "mpp18",
> diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> index ee67c70bf02e..64100ae204da 100644
> --- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
> @@ -70,6 +70,12 @@
> &cp0_syscon0 {
> cp0_pinctrl: pinctrl {
> compatible = "marvell,armada-8k-cpm-pinctrl";
> +
> + sdhci_pins: sdhi-pins {
> + marvell,pins = "mpp56", "mpp57", "mpp58",
> + "mpp59", "mpp60", "mpp61", "mpp62";
> + marvell,function = "sdio";
> + };
> };
> };
--
~. .~ Tk Open Systems
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