* Andi Kleen <[EMAIL PROTECTED]> wrote:
> nsec_barrier() is a new barrier primitive that stops RDTSC speculation
> to avoid races with timer interrupts on other CPUs.
>
> Add it to all architectures. Except for x86 it is a nop right now. I
> only tested x86, but it's a very simple change.
>
> On x86 it expands either to LFENCE (for Intel CPUs) or MFENCE (for AMD
> CPUs) which stops RDTSC on all currently known microarchitectures that
> implement SSE. On CPUs without SSE there is generally no RDTSC
> speculation.
i've picked up your rdtsc patches into x86.git but have simplified it:
there's no nsec_barrier() anymore - rdtsc() is always synchronous.
MFENCE/LFENCE is fast enough. Open-coding such barriers almost always
leads to needless trouble. Please check the next x86.git tree.
Ingo
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