Hi, Dear X86 Maintainers, On Tue, Nov 24, 2020 at 08:52:41PM +0000, Fenghua Yu wrote: > A bus lock [1] is acquired through either split locked access to > writeback (WB) memory or any locked access to non-WB memory. This is > typically >1000 cycles slower than an atomic operation within > a cache line. It also disrupts performance on other cores.
This is a friendly reminder. Any comment on this series? Thanks. -Fenghua
