> > > Anyway the hardware setup depicted above doesn't seem
> > > problematic at the first glance, but in fact it is. See, the DW *MAC
> > > driver
> > > (STMMAC ethernet driver) is doing the MAC reset each time it performs the
> > > device open or resume by means of the call-chain:
> > >
> > > stmmac_open()---+
> > >
> > > +->stmmac_hw_setup()->stmmac_init_dma_engine()->stmmac_reset().
> > > stmmac_resume()-+
> > >
> > > Such reset causes the whole interface reset: MAC, DMA and, what is more
> > > important, GPIOs as being exposed as part of the MAC registers. That
> > > in our case automatically causes the external PHY reset, what neither
> > > the STTMAC driver nor the PHY subsystem expect at all.
> >
>
> > Is the reset of the GPIO sub block under software control? When you
> > have a GPIO controller implemented, you would want to disable this.
>
> Not sure I've fully understood your question. The GPIO sub-block of
> the MAC is getting reset together with the MAC.
And my question is, is that under software control, or is the hardware
synthesised so that the GPIO controller is reset as part of the MAC
reset?
>From what you are saying, it sounds like from software you cannot
independently control the GPIO controller reset?
This is something i would be asking the hardware people. Look at the
VHDL, etc.
Andrew
