From: Nicholas Piggin <npig...@gmail.com>
[ Upstream commit 5844cc25fd121074de7895181a2fa1ce100a0fdd ]
A typo has the R field of the instruction assigned by lucky dip a la
register allocator.
Fixes: d4748276ae14c ("powerpc/64s: Improve local TLB flush for boot and MCE on
POWER9")
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com>
Signed-off-by: Michael Ellerman <m...@ellerman.id.au>
Link: https://lore.kernel.org/r/20201126102530.691335-2-npig...@gmail.com
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
arch/powerpc/mm/book3s64/hash_native.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/hash_native.c
b/arch/powerpc/mm/book3s64/hash_native.c
index cf20e5229ce1f..562094863e915 100644
--- a/arch/powerpc/mm/book3s64/hash_native.c
+++ b/arch/powerpc/mm/book3s64/hash_native.c
@@ -68,7 +68,7 @@ static __always_inline void tlbiel_hash_set_isa300(unsigned
int set, unsigned in
rs = ((unsigned long)pid << PPC_BITLSHIFT(31));
asm volatile(PPC_TLBIEL(%0, %1, %2, %3, %4)
- : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "r"(r)
+ : : "r"(rb), "r"(rs), "i"(ric), "i"(prs), "i"(r)
: "memory");
}
--
2.27.0
