On Thu, Nov 26, 2020 at 03:53:21PM +0100, Robert Foss wrote:
> During cci_isr() errors read from register fields belonging to
> i2c master1 are currently assigned to the status field belonging to
s/correctly/incorrectly
> i2c master0. This patch corrects this error, and always assigns
> master1 errors to the status field of master1.
>
This patch fixes a legitimate bug. So there should be a fixes tag!
> Suggested-by: Loic Poulain <loic.poul...@linaro.org>
Reported-by?
Thanks,
Mani
> Signed-off-by: Robert Foss <robert.f...@linaro.org>
> ---
> drivers/i2c/busses/i2c-qcom-cci.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-qcom-cci.c
> b/drivers/i2c/busses/i2c-qcom-cci.c
> index f13735beca58..1c259b5188de 100644
> --- a/drivers/i2c/busses/i2c-qcom-cci.c
> +++ b/drivers/i2c/busses/i2c-qcom-cci.c
> @@ -194,9 +194,9 @@ static irqreturn_t cci_isr(int irq, void *dev)
> if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_ERROR)) {
> if (val & CCI_IRQ_STATUS_0_I2C_M1_Q0_NACK_ERR ||
> val & CCI_IRQ_STATUS_0_I2C_M1_Q1_NACK_ERR)
> - cci->master[0].status = -ENXIO;
> + cci->master[1].status = -ENXIO;
> else
> - cci->master[0].status = -EIO;
> + cci->master[1].status = -EIO;
>
> writel(CCI_HALT_REQ_I2C_M1_Q0Q1, cci->base + CCI_HALT_REQ);
> ret = IRQ_HANDLED;
> --
> 2.27.0
>
