On Tue, Nov 24, 2020 at 07:38:55PM +0800, Suzuki K Poulose wrote:
> On 11/24/20 12:41 AM, Tingwei Zhang wrote:
> >On Mon, Nov 23, 2020 at 05:39:43PM +0800, Suzuki K Poulose wrote:
> >>On 11/23/20 7:58 AM, Tingwei Zhang wrote:
> >>>Hi Suzuki,
> >>>
> >>>On Fri, Nov 20, 2020 at 12:45:42AM +0800, Suzuki K Poulose wrote:
> >>>>ETM v4.4 onwards adds support for system instruction access
> >>>>to the ETM. Detect the support on an ETM and switch to using the
> >>>>mode when available.
> >>>>
> >>>>Cc: Mike Leach <mike.le...@linaro.org>
> >>>>Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
> >>>>Signed-off-by: Suzuki K Poulose <suzuki.poul...@arm.com>
> >>>>---
> >>>> .../coresight/coresight-etm4x-core.c | 39
> >>>>+++++++++++++++++++
> >>>> 1 file changed, 39 insertions(+)
> >>>>
> >>>>diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> >>>>b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> >>>>index 7ac0a185c146..5cbea9c27f58 100644
> >>>>--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> >>>>+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> >>>>@@ -684,6 +684,37 @@ static const struct coresight_ops etm4_cs_ops = {
> >>>> .source_ops = &etm4_source_ops,
> >>>> };
> >>>>
> >>>>+static inline bool cpu_supports_sysreg_trace(void)
> >>>>+{
> >>>>+ u64 dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
> >>>>+
> >>>>+ return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) > 0;
> >>>>+}
> >>>>+
> >>>>+static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata,
> >>>>+ struct csdev_access *csa)
> >>>>+{
> >>>>+ u32 devarch;
> >>>>+
> >>>>+ if (!cpu_supports_sysreg_trace())
> >>>>+ return false;
> >>>>+
> >>>>+ /*
> >>>>+ * ETMs implementing sysreg access must implement TRCDEVARCH.
> >>>>+ */
> >>>>+ devarch = read_etm4x_sysreg_const_offset(TRCDEVARCH);
> >>>>+ if ((devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETMv4x_ARCH)
> >>>
> >>>Is this driver suppose to work on ETM 5.0/ETE trace unit before ETE
> >>>driver
> >>>is ready?
> >>
> >>No, it is not supposed to work on an ETE without the ETE support. That
> >>check
> >>ensures that we only detect ETMv4x for now. The ETE driver support adds
> >>the
> >>ETE_ARCH as one of the supported ETMs. If you hack around it might still
> >>probe,
> >>but things could go terribly wrong if we access registers that are not
> >>available
> >>on ETE.
> >>
> >>Btw, are you able to test this series on an ETMv4.4+ system ?
> >>
> >I'm trying to test this series on an ETE. Look like it's not correct.
> >I'll apply ETE patch on top of this and test.
> >
>
> Yes please ! Much appreciated. Do you have a TRBE as well ? Or are you
> using a legacy CoreSight topology ?
>
I have TRBE as well.
> Kind regards
> Suzuki
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