Rene Herman <[EMAIL PROTECTED]> writes: > Alan, did you double-check that 8 us? I tried to but I seem to not > have trustworthy documentation.
I remember 16-bit CPU-driven ISA was able to do 2-3 MB/s transfers, that means at least 1 Maccesses/second = up to 1 microsecond/access. Perhaps IO ports accesses were slower than memory? But 8-12 times? Perhaps port 0x80 was using (slower) 8-bit timings? Bus-mastering ISA cards were able to do ca. 5 MB/s with 8 MHz (10 MHz?) clocking, some old machines didn't like it. Googling suggests that a slave access on 8-bit ISA bus was taking 6 cycles by default (including 4 wait states), 16-bit - 3 cycles (with 1 WS). Respectively 0.75 us and 0.375 us, and 0.25 us for 16-bit 0WS memory access (with standard 8 MHz clock). These values could be changed with BIOS setup, and devices could use 0WS or I/O CHRDY signals if they didn't like the defaults (dir 0WS mean 1 WS for 8-bit devices?). -- Krzysztof Halasa -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
