Most of the Allwinner SoCs contain a spinlock unit which can be used for synchronization/locking between different subsystems. According to the several Allwinner datasheets most of the sun8i and sun50i SoCs share the same hardware with at least 32 (32bit wide) registers for 32 spinlocks. The implemented spinlock hardware can support 32, 64, 128 or 256 registers.
This driver supports all four register bank sizes and also provides some additional information via debugfs. The driver can be build by setting the HWSPINLOCK_SUNXI symbol and can be also compiled as module. This patch adds the driver for this hardware and updates the hwlock documentation on how to use it. According to the datasheets the H2+, H3, H5 and H6 SoCs share exactly the same spinlock hardware. But I'm pretty sure that the whole sun8i family has the same hardware. The sun50i family may be a different story. The H616 is missing the whole spinlock part in the datasheets, so I assume this is a sun50i part that does not support hwspinlocks. The driver itself is not yet enabled in the devicetree files of the H2/H3, H5 and H6 SoCs, because for now I'm only able to test the driver against a H2+ device (OrangePi Zero). This patch adds: - hwspinlock driver sunxi_hwspinlock - hwspinlock dt bindings documentation - updates MAINTAINERS Signed-off-by: Wilken Gottwalt <wilken.gottw...@posteo.net> Wilken Gottwalt (2): dt-bindings: hwlock: sunxi: add sunxi_hwspinlock documentation hwspinlock: add sunxi hardware spinlock support .../bindings/hwlock/sunxi-hwspinlock.yaml | 64 ++++ MAINTAINERS | 6 + drivers/hwspinlock/Kconfig | 9 + drivers/hwspinlock/Makefile | 1 + drivers/hwspinlock/sunxi_hwspinlock.c | 282 ++++++++++++++++++ 5 files changed, 362 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/sunxi-hwspinlock.yaml create mode 100644 drivers/hwspinlock/sunxi_hwspinlock.c -- 2.29.2
