> From: Jason Gunthorpe <j...@nvidia.com> > Sent: Tuesday, November 10, 2020 10:24 PM > > On Tue, Nov 10, 2020 at 06:13:23AM -0800, Raj, Ashok wrote: > > > This isn't just for idxd, as I mentioned earlier, there are vendors other > > than Intel already working on this. In all cases the need for guest direct > > manipulation of interrupt store hasn't come up. From the discussion, it > > seems like there are devices today or in future that will require direct > > manipulation of interrupt store in the guest. This needs additional work > > in both the device hardware providing the right plumbing and OS work to > > comprehend those. > > We'd want to see SRIOV's assigned to guests to be able to use > IMS. This allows a SRIOV instance in a guest to spawn SIOV's which is > useful.
Does your VF support both MSI/IMS or IMS only? If it is the former can't we adopt a phased approach or parallel effort between forcing guest to use MSI and adding hypercall to enable IMS on VF? Finding a way to disable IMS is anyway required per earlier discussion when hypercall is not available, and it could still provide a functional though suboptimal model for such VFs. > > SIOV's assigned to guests could use IMS, but the use cases we see in > the short term can be handled by using SRIOV instead. > > I would expect in general for SIOV to use MSI-X emulation to expose > interrupts - it would be really weird for a SIOV emulator to do > something else and we should probably discourage that. > I agree with this point. This leaves hardware gaps in IOMMU and root complex less an immediate blocker and to be addressed in the long term. Thanks Kevin
