This series is based on v5.10-rc1 and MT8192 dts v6[1].
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/20201030092207.26488-2-seiya.w...@mediatek.com/
change since v4:
- merge some subsystem into same driver
- add a generic probe function to reduce duplicated code
changes since v3:
- add critical clocks
- split large patches into small ones
changes since v2:
- update and split dt-binding documents by functionalities
- add error checking in probe() function
- fix incorrect clock relation and add critical clocks
- update license identifier and minor fix of coding style
changes since v1:
- fix asymmetrical control of PLL
- have en_mask used as divider enable mask on all MediaTek SoC
Weiyi Lu (24):
dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c
wrapper controller
dt-bindings: ARM: Mediatek: Add new document bindings of mdpsys
controller
dt-bindings: ARM: Mediatek: Add new document bindings of msdc
controller
dt-bindings: ARM: Mediatek: Add new document bindings of scp adsp
controller
dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock
controllers
clk: mediatek: Add dt-bindings of MT8192 clocks
clk: mediatek: Fix asymmetrical PLL enable and disable control
clk: mediatek: Add configurable enable control to mtk_pll_data
clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
clk: mediatek: Add MT8192 basic clocks support
clk: mediatek: Add MT8192 audio clock support
clk: mediatek: Add MT8192 camsys clock support
clk: mediatek: Add MT8192 imgsys clock support
clk: mediatek: Add MT8192 imp i2c wrapper clock support
clk: mediatek: Add MT8192 ipesys clock support
clk: mediatek: Add MT8192 mdpsys clock support
clk: mediatek: Add MT8192 mfgcfg clock support
clk: mediatek: Add MT8192 mmsys clock support
clk: mediatek: Add MT8192 msdc clock support
clk: mediatek: Add MT8192 scp adsp clock support
clk: mediatek: Add MT8192 vdecsys clock support
clk: mediatek: Add MT8192 vencsys clock support
arm64: dts: mediatek: Add mt8192 clock controllers
arm64: dts: mediatek: Correct UART0 bus clock of MT8192
.../arm/mediatek/mediatek,apmixedsys.txt | 1 +
.../bindings/arm/mediatek/mediatek,audsys.txt | 1 +
.../bindings/arm/mediatek/mediatek,camsys.txt | 22 +
.../bindings/arm/mediatek/mediatek,imgsys.txt | 2 +
.../arm/mediatek/mediatek,imp_iic_wrap.yaml | 78 +
.../arm/mediatek/mediatek,infracfg.txt | 1 +
.../bindings/arm/mediatek/mediatek,ipesys.txt | 1 +
.../arm/mediatek/mediatek,mdpsys.yaml | 38 +
.../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 +
.../bindings/arm/mediatek/mediatek,mmsys.txt | 1 +
.../bindings/arm/mediatek/mediatek,msdc.yaml | 46 +
.../arm/mediatek/mediatek,pericfg.yaml | 1 +
.../arm/mediatek/mediatek,scp-adsp.yaml | 38 +
.../arm/mediatek/mediatek,topckgen.txt | 1 +
.../arm/mediatek/mediatek,vdecsys.txt | 8 +
.../arm/mediatek/mediatek,vencsys.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 165 +-
drivers/clk/mediatek/Kconfig | 80 +
drivers/clk/mediatek/Makefile | 13 +
drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++
drivers/clk/mediatek/clk-mt8192-cam.c | 107 ++
drivers/clk/mediatek/clk-mt8192-img.c | 70 +
.../clk/mediatek/clk-mt8192-imp_iic_wrap.c | 119 ++
drivers/clk/mediatek/clk-mt8192-ipe.c | 57 +
drivers/clk/mediatek/clk-mt8192-mdp.c | 82 +
drivers/clk/mediatek/clk-mt8192-mfg.c | 50 +
drivers/clk/mediatek/clk-mt8192-mm.c | 108 ++
drivers/clk/mediatek/clk-mt8192-msdc.c | 85 ++
drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 50 +
drivers/clk/mediatek/clk-mt8192-vdec.c | 94 ++
drivers/clk/mediatek/clk-mt8192-venc.c | 53 +
drivers/clk/mediatek/clk-mt8192.c | 1350 +++++++++++++++++
drivers/clk/mediatek/clk-mtk.c | 23 +
drivers/clk/mediatek/clk-mtk.h | 10 +
drivers/clk/mediatek/clk-mux.h | 15 +
drivers/clk/mediatek/clk-pll.c | 31 +-
include/dt-bindings/clock/mt8192-clk.h | 592 ++++++++
37 files changed, 3505 insertions(+), 8 deletions(-)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml
create mode 100644 drivers/clk/mediatek/clk-mt8192-aud.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-cam.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-img.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-ipe.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-mdp.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-mfg.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-mm.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-scp_adsp.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec.c
create mode 100644 drivers/clk/mediatek/clk-mt8192-venc.c
create mode 100644 drivers/clk/mediatek/clk-mt8192.c
create mode 100644 include/dt-bindings/clock/mt8192-clk.h
