This is a sdhci version of mmc's uhs2_[enable|disable]_clk operations.
Signed-off-by: Ben Chuang <[email protected]>
Signed-off-by: AKASHI Takahiro <[email protected]>
---
drivers/mmc/host/sdhci-uhs2.c | 41 +++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
index 994dff967e85..55362ace1857 100644
--- a/drivers/mmc/host/sdhci-uhs2.c
+++ b/drivers/mmc/host/sdhci-uhs2.c
@@ -11,6 +11,7 @@
*/
#include <linux/delay.h>
+#include <linux/ktime.h>
#include <linux/module.h>
#include "sdhci.h"
@@ -385,6 +386,42 @@ void sdhci_uhs2_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
__sdhci_uhs2_set_ios(mmc, ios);
}
+static void sdhci_uhs2_disable_clk(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+
+ clk &= ~SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+}
+
+static void sdhci_uhs2_enable_clk(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ ktime_t timeout;
+
+ clk |= SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+ /* Wait max 20 ms */
+ timeout = ktime_add_ms(ktime_get(), 20);
+ while (1) {
+ bool timedout = ktime_after(ktime_get(), timeout);
+
+ clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+ if (clk & SDHCI_CLOCK_INT_STABLE)
+ break;
+ if (timedout) {
+ pr_err("%s: Internal clock never stabilised.\n",
+ mmc_hostname(host->mmc));
+ sdhci_dumpregs(host);
+ return;
+ }
+ udelay(10);
+ }
+}
+
/*****************************************************************************\
* *
* Driver init/exit *
@@ -556,6 +593,10 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host
*host)
if (!host->mmc_host_ops.uhs2_detect_init)
host->mmc_host_ops.uhs2_detect_init = sdhci_uhs2_do_detect_init;
+ if (!host->mmc_host_ops.uhs2_disable_clk)
+ host->mmc_host_ops.uhs2_disable_clk = sdhci_uhs2_disable_clk;
+ if (!host->mmc_host_ops.uhs2_enable_clk)
+ host->mmc_host_ops.uhs2_enable_clk = sdhci_uhs2_enable_clk;
return 0;
}
--
2.28.0
