[PATCH 10/25] ASoC: sun8i-codec: Program format before clock inversion

[Samuel Holland]

The LRCK inversion bit has a different meaning in DSP mode: it selects
between DSP A and DSP B formats. To support this, we need to know if
the selected format is a DSP format. One easy way to do this is to set
the format field before the inversion fields.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---
 sound/soc/sunxi/sun8i-codec.c | 46 +++++++++++++++++------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c
index 346f699c2e86..0b713b2a2028 100644
--- a/sound/soc/sunxi/sun8i-codec.c
+++ b/sound/soc/sunxi/sun8i-codec.c
@@ -168,33 +168,55 @@ static int sun8i_codec_get_hw_rate(struct 
snd_pcm_hw_params *params)
        default:
                return -EINVAL;
        }
 }
 
 static int sun8i_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 {
        struct sun8i_codec *scodec = snd_soc_dai_get_drvdata(dai);
-       u32 value;
+       u32 format, value;
 
        /* clock masters */
        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
        case SND_SOC_DAIFMT_CBS_CFS: /* Codec slave, DAI master */
                value = 0x1;
                break;
        case SND_SOC_DAIFMT_CBM_CFM: /* Codec Master, DAI slave */
                value = 0x0;
                break;
        default:
                return -EINVAL;
        }
        regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
                           BIT(SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD),
                           value << SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD);
 
+       /* DAI format */
+       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+       case SND_SOC_DAIFMT_I2S:
+               format = 0x0;
+               break;
+       case SND_SOC_DAIFMT_LEFT_J:
+               format = 0x1;
+               break;
+       case SND_SOC_DAIFMT_RIGHT_J:
+               format = 0x2;
+               break;
+       case SND_SOC_DAIFMT_DSP_A:
+       case SND_SOC_DAIFMT_DSP_B:
+               format = 0x3;
+               break;
+       default:
+               return -EINVAL;
+       }
+       regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
+                          SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT_MASK,
+                          format << SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT);
+
        /* clock inversion */
        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
        case SND_SOC_DAIFMT_NB_NF: /* Normal */
                value = 0x0;
                break;
        case SND_SOC_DAIFMT_IB_IF: /* Inversion */
                value = 0x1;
                break;
@@ -215,38 +237,16 @@ static int sun8i_codec_set_fmt(struct snd_soc_dai *dai, 
unsigned int fmt)
         * that the codec probably gets it backward, and we have to
         * invert the value here.
         */
        value ^= scodec->quirks->lrck_inversion;
        regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
                           BIT(SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV),
                           value << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV);
 
-       /* DAI format */
-       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
-       case SND_SOC_DAIFMT_I2S:
-               value = 0x0;
-               break;
-       case SND_SOC_DAIFMT_LEFT_J:
-               value = 0x1;
-               break;
-       case SND_SOC_DAIFMT_RIGHT_J:
-               value = 0x2;
-               break;
-       case SND_SOC_DAIFMT_DSP_A:
-       case SND_SOC_DAIFMT_DSP_B:
-               value = 0x3;
-               break;
-       default:
-               return -EINVAL;
-       }
-       regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
-                          SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT_MASK,
-                          value << SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT);
-
        return 0;
 }
 
 struct sun8i_codec_clk_div {
        u8      div;
        u8      val;
 };
 
-- 
2.26.2