Hi Andrew,
> -----Original Message----- > From: Andrew Jeffery <[email protected]> > Sent: Wednesday, September 30, 2020 2:12 PM > To: Ryan Chen <[email protected]>; ChiaWei Wang > <[email protected]>; Joel Stanley <[email protected]> > Subject: Re: [PATCH 0/4] Remove LPC register partitioning > > > > On Mon, 28 Sep 2020, at 17:13, Ryan Chen wrote: > > Hello Joel & Andrew, > > Those patches are more organize for ASPEED SOC LPC register layout. > > Does those patches have any feedback? > > I support getting the problem fixed. However, the series also needs to fix the > LPC devicetree binding at > > Documentation/devicetree/bindings/mfd/aspeed-lpc.txt > > What's proposed isn't backwards compatible. We need to agree that a > breaking change is the way we want to go and get Rob's buy-in. Given the > impact of the change I'd prefer we don't try to maintain backwards > compatibility. All known users of the binding ship the dtb with the kernel. > > Can we get a v2 with the binding documentation fixed? That will probably need > some review. Yes, I will fix the binding documentation and resend the v2 patch for the review. Thanks.
