The following commit has been merged into the x86/cpu branch of tip: Commit-ID: e1ebb2b49048c4767cfa0d8466f9c701e549fa5e Gitweb: https://git.kernel.org/tip/e1ebb2b49048c4767cfa0d8466f9c701e549fa5e Author: Krish Sadhukhan <krish.sadhuk...@oracle.com> AuthorDate: Thu, 17 Sep 2020 21:20:38 Committer: Borislav Petkov <b...@suse.de> CommitterDate: Sat, 19 Sep 2020 20:46:59 +02:00
KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains In some hardware implementations, coherency between the encrypted and unencrypted mappings of the same physical page in a VM is enforced. In such a system, it is not required for software to flush the VM's page from all CPU caches in the system prior to changing the value of the C-bit for the page. So check that bit before flushing the cache. Signed-off-by: Krish Sadhukhan <krish.sadhuk...@oracle.com> Signed-off-by: Borislav Petkov <b...@suse.de> Acked-by: Paolo Bonzini <pbonz...@redhat.com> Link: https://lkml.kernel.org/r/20200917212038.5090-4-krish.sadhuk...@oracle.com --- arch/x86/kvm/svm/sev.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 402dc42..567792f 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -384,7 +384,8 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages) uint8_t *page_virtual; unsigned long i; - if (npages == 0 || pages == NULL) + if (this_cpu_has(X86_FEATURE_SME_COHERENT) || npages == 0 || + pages == NULL) return; for (i = 0; i < npages; i++) {
