On 6/26/20 3:07 AM, Christoph Hellwig wrote: > The code handling non-coherent DMA depends on being able to remap code > as non-cached. But that can't be done without an MMU, so using this > option on NOMMU builds is broken.
I'm working on a nommu j-core board that's doing DMA behind the OS's back at the moment, which I have a todo item to teach the kernel about. The DMA does not go through the cache, there's currently a cache flush before looking at the result instead. How should this be wired up after your patch? Rob