On 29/05/2020 09.43, Like Xu wrote:
> When the full-width writes capability is set, use the alternative MSR
> range to write larger sign counter values (up to GP counter width).
>
> Signed-off-by: Like Xu <like...@linux.intel.com>
> ---
> lib/x86/msr.h | 1 +
> x86/pmu.c | 125 ++++++++++++++++++++++++++++++++++++++++----------
> 2 files changed, 102 insertions(+), 24 deletions(-)
[...]
> @@ -452,6 +468,66 @@ static void check_running_counter_wrmsr(void)
> report_prefix_pop();
> }
>
> +static void check_counters(void)
> +{
> + check_gp_counters();
> + check_fixed_counters();
> + check_rdpmc();
> + check_counters_many();
> + check_counter_overflow();
> + check_gp_counter_cmask();
> + check_running_counter_wrmsr();
> +}
> +
> +static void do_unsupported_width_counter_write(void *index)
> +{
> + wrmsr(MSR_IA32_PMC0 + *((int *) index), 0xffffff0123456789ull);
> +}
> +
> +static void check_gp_counters_write_width(void)
> +{
> + u64 val_64 = 0xffffff0123456789ull;
> + u64 val_32 = val_64 & ((1ul << 32) - 1);
Hi,
this broke compilation on 32-bit hosts:
https://travis-ci.com/github/huth/kvm-unit-tests/jobs/349654654#L710
Fix should be easy, I guess - either use 1ull or specify the mask
0xffffffff directly.
Thomas
