On 6/10/20 12:54 AM, Dilip Kota wrote: > > On 6/9/2020 9:46 PM, Guenter Roeck wrote: >> On 6/9/20 1:57 AM, Dilip Kota wrote: >>> On 6/8/2020 9:37 PM, Guenter Roeck wrote: >>>> On 6/7/20 10:49 PM, Dilip Kota wrote: >>>>> Add YAML schemas for the watchdog timer on Intel Lightning >>>>> Mountain SoC. >>>>> >>>>> Signed-off-by: Dilip Kota <eswara.k...@linux.intel.com> >>>>> --- >>>>> .../bindings/watchdog/intel,lgm-gptc-wdt.yaml | 75 >>>>> ++++++++++++++++++++++ >>>>> 1 file changed, 75 insertions(+) >>>>> create mode 100644 >>>>> Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml >>>>> >>>>> diff --git >>>>> a/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml >>>>> b/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml >>>>> new file mode 100644 >>>>> index 0000000000000..83dc39a5090c1 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/watchdog/intel,lgm-gptc-wdt.yaml >>>>> @@ -0,0 +1,75 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/watchdog/intel,lgm-gptc-wdt.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: Intel Lightning Mountain Watchdog timer. >>>>> + >>>>> +maintainers: >>>>> + - Dilip Kota <eswara.k...@linux.intel.com> >>>>> + >>>>> +description: | >>>>> + Intel Lightning Mountain SoC has General Purpose Timer Counter(GPTC) >>>>> which can >>>>> + be configured as Clocksource, real time clock and Watchdog timer. >>>>> + Each General Purpose Timer Counter has three timers. And total four >>>>> General >>>>> + Purpose Timer Counters are present on Lightning Mountain SoC which >>>>> sums up >>>>> + to 12 timers. >>>>> + Lightning Mountain has four CPUs and each CPU is configured with one >>>>> GPTC >>>>> + timer as watchdog timer. Total four timers are configured as watchdog >>>>> timers >>>>> + on Lightning Mountain SoC. >>>>> + >>>> Why not just one ? The watchdog subsystem does not monitor individual CPUs, >>>> it monitors the system. >>> Intel Atom based Lightning Mountain SoC, system has four CPUs. On Lightning >>> Mountain SoC ,Watchdog subsystem is combination of GPTC timers and reset >>> controller unit. On Lightning Mountain SoC, each CPU is configured with one >>> GPTC timer, so that if any of the CPU hangs or freezes, the watchdog daemon >>> running on respective CPU cannot reset/ping or pet the watchdog timer. This >>> causes the watchdog timeout. On watchdog timeout, reset controller triggers >>> the reset to respective CPU. >>> >> A system watchdog driver should not duplicate functionality >> from kernel/watchdog.c, which monitors individual CPUs. >> If the SoC does nto provide a system watchdog timer (which >> I think is unlikely), it should stick with that. A watchdog >> resetting an individual CPU instead of the entire system >> isn't something I would want to see in the watchdog subsystem. > My bad here, complete hardware reset happens on watchdog timeout not a single > CPU or core. > Could you please clarify: The complete system means, you mean, "a watchdog > susbsystem should monitor all the cores/cpus in the SoC. Not like each > core/cpu in SoC having a wdt". >
No, the watchdog subsystem does not monitor "all cores". Again, that is the responsibility of kernel/watchdog.c. Guenter > Regards, > Dilip >> >> Guenter >>
