> From: Anson Huang <anson.hu...@nxp.com>
> Sent: Wednesday, May 20, 2020 2:30 PM
>
> i.MX6/7 SoCs' temperature sensor is inside anatop module from HW perspective,
> so it should be a child node of anatop.
>
> Signed-off-by: Anson Huang <anson.hu...@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.d...@nxp.com>
BTW, I think you also need a binding doc for this change.
Regards
Aisheng
> ---
> arch/arm/boot/dts/imx6qdl.dtsi | 22 +++++++++++-----------
> arch/arm/boot/dts/imx6sl.dtsi | 20 ++++++++++----------
> arch/arm/boot/dts/imx6sll.dtsi | 20 ++++++++++----------
> arch/arm/boot/dts/imx6sx.dtsi | 20 ++++++++++----------
> arch/arm/boot/dts/imx6ul.dtsi | 20 ++++++++++----------
> arch/arm/boot/dts/imx7s.dtsi | 20 ++++++++++----------
> 6 files changed, 61 insertions(+), 61 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 39d4afd..43d44d5 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -69,17 +69,6 @@
> };
> };
>
> - tempmon: tempmon {
> - compatible = "fsl,imx6q-tempmon";
> - interrupt-parent = <&gpc>;
> - interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
> - #thermal-sensor-cells = <0>;
> - };
> -
> ldb: ldb {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -795,6 +784,17 @@
> anatop-min-voltage = <725000>;
> anatop-max-voltage = <1450000>;
> };
> +
> + tempmon: tempmon {
> + compatible = "fsl,imx6q-tempmon";
> + interrupt-parent = <&gpc>;
> + interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks
> IMX6QDL_CLK_PLL3_USB_OTG>;
> + #thermal-sensor-cells = <0>;
> + };
> };
>
> usbphy1: usbphy@20c9000 {
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index 911d8cf..d8efc0a 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -93,16 +93,6 @@
> };
> };
>
> - tempmon: tempmon {
> - compatible = "fsl,imx6q-tempmon";
> - interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-parent = <&gpc>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
> - };
> -
> pmu {
> compatible = "arm,cortex-a9-pmu";
> interrupt-parent = <&gpc>;
> @@ -628,6 +618,16 @@
> anatop-min-voltage = <725000>;
> anatop-max-voltage = <1450000>;
> };
> +
> + tempmon: tempmon {
> + compatible = "fsl,imx6q-tempmon";
> + interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&gpc>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks
> IMX6SL_CLK_PLL3_USB_OTG>;
> + };
> };
>
> usbphy1: usbphy@20c9000 {
> diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
> index edd3abb..bf7f048 100644
> --- a/arch/arm/boot/dts/imx6sll.dtsi
> +++ b/arch/arm/boot/dts/imx6sll.dtsi
> @@ -105,16 +105,6 @@
> clock-output-names = "ipp_di1";
> };
>
> - tempmon: temperature-sensor {
> - compatible = "fsl,imx6sll-tempmon", "fsl,imx6sx-tempmon";
> - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-parent = <&gpc>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
> - };
> -
> soc {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -531,6 +521,16 @@
> anatop-max-voltage = <3400000>;
> anatop-enable-bit = <0>;
> };
> +
> + tempmon: temperature-sensor {
> + compatible = "fsl,imx6sll-tempmon",
> "fsl,imx6sx-tempmon";
> + interrupts = <GIC_SPI 49
> IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&gpc>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks
> IMX6SLL_CLK_PLL3_USB_OTG>;
> + };
> };
>
> usbphy1: usb-phy@20c9000 {
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index e031337..8c4473b 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -134,16 +134,6 @@
> clock-output-names = "anaclk2";
> };
>
> - tempmon: tempmon {
> - compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
> - interrupt-parent = <&gpc>;
> - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
> - };
> -
> pmu {
> compatible = "arm,cortex-a9-pmu";
> interrupt-parent = <&gpc>;
> @@ -696,6 +686,16 @@
> anatop-min-voltage = <725000>;
> anatop-max-voltage = <1450000>;
> };
> +
> + tempmon: tempmon {
> + compatible = "fsl,imx6sx-tempmon",
> "fsl,imx6q-tempmon";
> + interrupt-parent = <&gpc>;
> + interrupts = <GIC_SPI 49
> IRQ_TYPE_LEVEL_HIGH>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks
> IMX6SX_CLK_PLL3_USB_OTG>;
> + };
> };
>
> usbphy1: usbphy@20c9000 {
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 35e7301..505fd4f 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -131,16 +131,6 @@
> clock-output-names = "ipp_di1";
> };
>
> - tempmon: tempmon {
> - compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
> - interrupt-parent = <&gpc>;
> - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
> - };
> -
> pmu {
> compatible = "arm,cortex-a7-pmu";
> interrupt-parent = <&gpc>;
> @@ -611,6 +601,16 @@
> anatop-min-voltage = <725000>;
> anatop-max-voltage = <1450000>;
> };
> +
> + tempmon: tempmon {
> + compatible = "fsl,imx6ul-tempmon",
> "fsl,imx6sx-tempmon";
> + interrupt-parent = <&gpc>;
> + interrupts = <GIC_SPI 49
> IRQ_TYPE_LEVEL_HIGH>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&tempmon_temp_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks
> IMX6UL_CLK_PLL3_USB_OTG>;
> + };
> };
>
> usbphy1: usbphy@20c9000 {
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index
> 8bac491..3904558 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -147,16 +147,6 @@
> };
> };
>
> - tempmon: tempmon {
> - compatible = "fsl,imx7d-tempmon";
> - interrupt-parent = <&gpc>;
> - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> - fsl,tempmon = <&anatop>;
> - nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
> - nvmem-cell-names = "calib", "temp_grade";
> - clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
> - };
> -
> timer {
> compatible = "arm,armv7-timer";
> interrupt-parent = <&intc>;
> @@ -586,6 +576,16 @@
> anatop-max-voltage = <1300000>;
> anatop-enable-bit = <0>;
> };
> +
> + tempmon: tempmon {
> + compatible = "fsl,imx7d-tempmon";
> + interrupt-parent = <&gpc>;
> + interrupts = <GIC_SPI 49
> IRQ_TYPE_LEVEL_HIGH>;
> + fsl,tempmon = <&anatop>;
> + nvmem-cells = <&tempmon_calib>,
> <&fuse_grade>;
> + nvmem-cell-names = "calib",
> "temp_grade";
> + clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
> + };
> };
>
> snvs: snvs@30370000 {
> --
> 2.7.4
