Hi,
Thinh Nguyen <thinh.ngu...@synopsys.com> writes:
> Jun Li wrote:
>>> -----Original Message-----
>>> From: Felipe Balbi <bal...@gmail.com> On Behalf Of Felipe Balbi
>>> Sent: 2020年5月15日 17:31
>>> To: Jun Li <lijun.ker...@gmail.com>
>>> Cc: John Stultz <john.stu...@linaro.org>; lkml
>>> <linux-kernel@vger.kernel.org>; Yu
>>> Chen <cheny...@huawei.com>; Greg Kroah-Hartman
>>> <gre...@linuxfoundation.org>; Rob
>>> Herring <robh...@kernel.org>; Mark Rutland <mark.rutl...@arm.com>; ShuFan
>>> Lee
>>> <shufan_...@richtek.com>; Heikki Krogerus <heikki.kroge...@linux.intel.com>;
>>> Suzuki K Poulose <suzuki.poul...@arm.com>; Chunfeng Yun
>>> <chunfeng....@mediatek.com>; Hans de Goede <hdego...@redhat.com>; Andy
>>> Shevchenko
>>> <andy.shevche...@gmail.com>; Valentin Schneider
>>> <valentin.schnei...@arm.com>;
>>> Jack Pham <ja...@codeaurora.org>; Linux USB List
>>> <linux-...@vger.kernel.org>; open
>>> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
>>> <devicet...@vger.kernel.org>;
>>> Peter Chen <peter.c...@nxp.com>; Jun Li <jun...@nxp.com>; Thinh Nguyen
>>> <thinh.ngu...@synopsys.com>
>>> Subject: Re: [PATCH v4 3/9] usb: dwc3: Increase timeout for CmdAct cleared
>>> by device
>>> controller
>>>
>>>
>>> Hi,
>>>
>>> Jun Li <lijun.ker...@gmail.com> writes:
>>>>> @@ -397,12 +407,18 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep,
>>>>> unsigned
>>> cmd,
>>>>> dwc3_gadget_ep_get_transfer_index(dep);
>>>>> }
>>>>>
>>>>> - if (saved_config) {
>>>>> + if (saved_hs_config) {
>>>>> reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
>>>>> - reg |= saved_config;
>>>>> + reg |= saved_hs_config;
>>>>> dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
>>>>> }
>>>>>
>>>>> + if (saved_ss_config) {
>>>>> + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
>>>>> + reg |= saved_ss_config;
>>>>> + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
>>>>> + }
>>>>> +
>>>>> return ret;
>>>>> }
>>>> Unfortunately this way can't work, once the SS PHY enters P3, disable
>>>> suspend_en can't force SS PHY exit P3, unless do this at the very
>>>> beginning to prevent SS PHY entering P3(e.g. add
>>>> "snps,dis_u3_susphy_quirk" for
>>> test).
>>>
>>> It sounds like you have a quirky PHY.
>> From what I got from the IC design, the behavior of DWC3_GUSB3PIPECTL_SUSPHY
>> bit should be as what I said, not a quirky.
>>
>> Hi Thinh, could you comment this?
>
> You only need to wake up the usb2 phy when issuing the command while
> running in highspeed or below. If you're running in SS or higher,
> internally the controller does it for you for usb3 phy. In Jun's case,
> it seems like it takes longer for his phy to wake up.
>
> IMO, in this case, I think it's fine to increase the command timeout.Is there an upper limit to this? Is 32k clock the slowest that can be fed to the PHY as a suspend clock? -- balbi
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