[PATCH] arm64: dts: qcom: sm8250: Add TLMM pinctrl node

[Bjorn Andersson]

Add the TLMM pinctrl node for SM8250 and reserve pins 28-31 and 40-43 on
the MTP as firmware does not allow Linux to touch these pins.

Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250-mtp.dts |  4 ++++
 arch/arm64/boot/dts/qcom/sm8250.dtsi    | 15 +++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts 
b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 2adb01ea276c..0c6b936be471 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -348,6 +348,10 @@ &qupv3_id_1 {
        status = "okay";
 };
 
+&tlmm {
+       gpio-reserved-ranges = <28 4>, <40 4>;
+};
+
 &uart2 {
        status = "okay";
 };
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi 
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 7050adba7995..9867b0da9d8e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -491,6 +491,21 @@ tcsr_mutex_regs: syscon@1f40000 {
                        reg = <0x0 0x01f40000 0x0 0x40000>;
                };
 
+               tlmm: pinctrl@f100000 {
+                       compatible = "qcom,sm8250-pinctrl";
+                       reg = <0 0x0f100000 0 0x300000>,
+                             <0 0x0f500000 0 0x300000>,
+                             <0 0x0f900000 0 0x300000>;
+                       reg-names = "west", "south", "north";
+                       interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       gpio-ranges = <&tlmm 0 0 180>;
+                       wakeup-parent = <&pdc>;
+               };
+
                timer@17c20000 {
                        #address-cells = <2>;
                        #size-cells = <2>;
-- 
2.24.0