Hello Daniel, On Fri, Sep 13, 2019 at 10:28:07PM +0300, Daniel Baluta wrote: > The SAI transmitter and receiver can be configured to operate with > synchronous bit clock and frame sync. > > When Tx is synchronous with receiver RCSR.RE should be set in playback > to enable the receiver which provides bit clock and frame sync. > > When Rx is synchronous with transmitter TCSR.TE should be set in record > to enable the transmitter which provides bit clock and frame sync.
I don't quite get what this patch fixes....can you explain? > @@ -539,8 +539,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream > *substream, int cmd, > sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0); > > /* > - * It is recommended that the transmitter is the last enabled > - * and the first disabled. This is copied from iMX6SX Reference Manual, IIRC...And I just took a look at iMX8DXP/QXP RM: it has the exact same statement in "16.16.3.3.1 Synchronous mode" section. > + * it is recommended that the asynchronous block to be the last enabled > + * and the first disabled So... why are we changing to this? Any update/explain? Thank you
