This series is based on v5.3-rc1 and Mediatek MT8183 scpsys support v7[1]. Since Runtime PM is supported in Common Clock Framework which keeps clock controller's power domain enabled to ensure clock status accessing correctly.
[1] https://patchwork.kernel.org/cover/11118371/ --- Weiyi Lu (3): clk: mediatek: Register clock gate with device clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider arm64: dts: Add power-domains properity to mfgcfg arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + drivers/clk/mediatek/clk-gate.c | 5 +++-- drivers/clk/mediatek/clk-gate.h | 3 ++- drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 7 +++++-- drivers/clk/mediatek/clk-mtk.c | 16 +++++++++++++--- drivers/clk/mediatek/clk-mtk.h | 5 +++++ 6 files changed, 29 insertions(+), 8 deletions(-)
