On Thu, 29 Aug 2019, Kai-Heng Feng wrote:
> at 20:13, Thomas Gleixner <t...@linutronix.de> wrote:
> > On Thu, 29 Aug 2019, Kai-Heng Feng wrote:
> >
> > > Some Coffee Lake platforms have skewed HPET timer once the SoCs entered
> > > PC10, and marked TSC as unstable clocksource as result.
> >
> > So here you talk about Coffee Lake and in the patch you use KABYLAKE.
>
> Coffeelake has the same model number as Kabylake.
Yeah, just a bit more text explaining that would be helpful.
> > > +static const struct x86_cpu_id hpet_blacklist[] __initconst = {
> > > + { X86_VENDOR_INTEL, 6, INTEL_FAM6_KABYLAKE_MOBILE },
> > > + { X86_VENDOR_INTEL, 6, INTEL_FAM6_KABYLAKE_DESKTOP },
> >
> > So this disables HPET on all Kaby Lake variants not just on the affected
> > Coffee Lakes. I know that I rejected the initial patch with the random
> > stepping cutoff...
> >
> >
> > https://lore.kernel.org/lkml/alpine.deb.2.21.1904081403220.1...@nanos.tec.linutronix.de
> >
> > In the other attempt to 'fix' this I asked for clarification, but silence
> > from Intel after this:
> >
> >
> > https://lore.kernel.org/lkml/alpine.deb.2.21.1905182015320.3...@nanos.tec.linutronix.de
> >
> > Can Intel please provide some useful information about this finally?
>
> Hopefully Intel can provide more info.
>
> I know we should find the root cause rather than stopping at "it’s a firmware
> bug”, but users are already affected by this issue [1].
> Is there any better short-term workaround?
Not really. And if Intel stays silent, I'm just going to apply it as is
along with a stable tag.
Thanks,
tglx
