From: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
Add a function returning the mask of currently enabled ASPM link
states for a given device.
It will be used by the NVMe driver to decide how to handle the
device during system suspend.
Signed-off-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com>
---
-> v2:
* Move the PCI/PCIe ASPM changes to a separate patch.
* Add the _mask suffix to the new function name.
* Add EXPORT_SYMBOL_GPL() to the new function.
* Avoid adding an unnecessary blank line.
---
drivers/pci/pcie/aspm.c | 20 ++++++++++++++++++++
include/linux/pci.h | 3 +++
2 files changed, 23 insertions(+)
Index: linux-pm/drivers/pci/pcie/aspm.c
===================================================================
--- linux-pm.orig/drivers/pci/pcie/aspm.c
+++ linux-pm/drivers/pci/pcie/aspm.c
@@ -1170,6 +1170,26 @@ static int pcie_aspm_get_policy(char *bu
module_param_call(policy, pcie_aspm_set_policy, pcie_aspm_get_policy,
NULL, 0644);
+/*
+ * pcie_aspm_enabled_mask - Return the mask of enabled ASPM link states.
+ * @pci_device: Target device.
+ */
+u32 pcie_aspm_enabled_mask(struct pci_dev *pci_device)
+{
+ struct pci_dev *bridge = pci_upstream_bridge(pci_device);
+ u32 ret;
+
+ if (!bridge)
+ return 0;
+
+ mutex_lock(&aspm_lock);
+ ret = bridge->link_state ? bridge->link_state->aspm_enabled : 0;
+ mutex_unlock(&aspm_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcie_aspm_enabled_mask);
+
#ifdef CONFIG_PCIEASPM_DEBUG
static ssize_t link_state_show(struct device *dev,
struct device_attribute *attr,
Index: linux-pm/include/linux/pci.h
===================================================================
--- linux-pm.orig/include/linux/pci.h
+++ linux-pm/include/linux/pci.h
@@ -1567,8 +1567,11 @@ extern bool pcie_ports_native;
#ifdef CONFIG_PCIEASPM
bool pcie_aspm_support_enabled(void);
+u32 pcie_aspm_enabled_mask(struct pci_dev *pci_device);
#else
static inline bool pcie_aspm_support_enabled(void) { return false; }
+static inline u32 pcie_aspm_enabled_mask(struct pci_dev *pci_device)
+{ return 0; }
#endif
#ifdef CONFIG_PCIEAER
