Re: [PATCH v5 2/3] KVM: vmx: Emulate MSR IA32_UMWAIT_CONTROL

[Tao Xu]

On 7/3/2019 12:37 AM, Paolo Bonzini wrote:
On 20/06/19 11:46, Xiaoyao Li wrote:
You cannot put the atomic switch here. What if umwait_control_cached is changed
at runtime? Host kernel patch exposed a sysfs interface to let it happen.

Thanks for the review, Xiaoyao.  I agree with both of your remarks.

Paolo

Hi paolo,

The issues have been solved in v6 patches, could you help to review v6 
patches?

Thanks

Tao

+               break;
        case MSR_IA32_SPEC_CTRL:
                if (!msr_info->host_initiated &&
                    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
@@ -4126,6 +4148,8 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool
init_event)
        vmx->rmode.vm86_active = 0;
        vmx->spec_ctrl = 0;
  
+	vmx->msr_ia32_umwait_control = 0;
+
        vcpu->arch.microcode_version = 0x100000000ULL;
        vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
        kvm_set_cr8(vcpu, 0);
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 61128b48c503..8485bec7c38a 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -14,6 +14,8 @@
  extern const u32 vmx_msr_index[];
  extern u64 host_efer;
  
+extern u32 umwait_control_cached;
+
  #define MSR_TYPE_R    1
  #define MSR_TYPE_W    2
  #define MSR_TYPE_RW   3
@@ -194,6 +196,7 @@ struct vcpu_vmx {
  #endif
  
  	u64		      spec_ctrl;
+       u64                   msr_ia32_umwait_control;
  
  	u32 vm_entry_controls_shadow;
        u32 vm_exit_controls_shadow;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 83aefd759846..4480de459bf4 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1138,6 +1138,7 @@ static u32 msrs_to_save[] = {
        MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
        MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
        MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
+       MSR_IA32_UMWAIT_CONTROL,
  };
  
  static unsigned num_msrs_to_save;