On Mon, Sep 03, 2007 at 04:33:19AM -0700, Arjan van de Ven wrote: > On Mon, 3 Sep 2007 11:17:18 +0200 > "Andreas Herrmann" <[EMAIL PROTECTED]> wrote: > \> > > Do you see any other issues besides the naming of the bit? > > I wonder if we should key this off a PCI ID of the chipset rather than > the cpu id... I mean, how sure are you that all via chipsets connected > to the barcelona cpu will deal well?
In general they should be able to deal with those accesses. They result in extended type 0/1 configuration cycles which are defined already in HT I/O Link Spec 1.10. So if unexpectedly problems arise then it is time to add a pci-quirk. But at the moment there is no need for further discussion on this subject because Andi refuses to add support for Barcelona CF8/CFC ECS access. Regards, Andreas -- Operating | AMD Saxony Limited Liability Company & Co. KG, System | Wilschdorfer Landstr. 101, 01109 Dresden, Germany Research | Register Court Dresden: HRA 4896, General Partner authorized Center | to represent: AMD Saxony LLC (Wilmington, Delaware, US) (OSRC) | General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
