[PATCH 5.1 003/121] mmc: sdhi: disallow HS400 for M3-W ES1.2, RZ/G2M, and V3H

[Greg Kroah-Hartman]

From: Wolfram Sang <wsa+rene...@sang-engineering.com>

commit 97bf85b6ec9e6597ce81c79b26a28f7918fc4eaf upstream.

Our HW engineers informed us that HS400 is not working on these SoC
revisions.

Fixes: 0f4e2054c971 ("mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W 
ES1.[012]")
Signed-off-by: Wolfram Sang <wsa+rene...@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+rene...@ragnatech.se>
Cc: sta...@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hans...@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 drivers/mmc/host/renesas_sdhi_core.c |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -620,11 +620,16 @@ static const struct renesas_sdhi_quirks
        .hs400_4taps = true,
 };
 
+static const struct renesas_sdhi_quirks sdhi_quirks_nohs400 = {
+       .hs400_disabled = true,
+};
+
 static const struct soc_device_attribute sdhi_quirks_match[]  = {
        { .soc_id = "r8a7795", .revision = "ES1.*", .data = 
&sdhi_quirks_h3_m3w_es1 },
        { .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_h3_es2 
},
-       { .soc_id = "r8a7796", .revision = "ES1.0", .data = 
&sdhi_quirks_h3_m3w_es1 },
-       { .soc_id = "r8a7796", .revision = "ES1.1", .data = 
&sdhi_quirks_h3_m3w_es1 },
+       { .soc_id = "r8a7796", .revision = "ES1.[012]", .data = 
&sdhi_quirks_h3_m3w_es1 },
+       { .soc_id = "r8a774a1", .revision = "ES1.[012]", .data = 
&sdhi_quirks_h3_m3w_es1 },
+       { .soc_id = "r8a77980", .data = &sdhi_quirks_nohs400 },
        { /* Sentinel. */ },
 };