On Tue, 28 Aug 2007, Mathieu Desnoyers wrote: > Ok, I just had a look at ia64 instruction set, and I fear that cmpxchg > must always come with the acquire or release semantic. Is there any > cmpxchg equivalent on ia64 that would be acquire and release semantic > free ? This implicit memory ordering in the instruction seems to be > responsible for the slowdown.
No. There is no cmpxchg used in the patches that I tested. The slowdown seem to come from the need to serialize at barriers. Adding an interrupt enable/disable in the middle of the hot path creates another serialization point. > If such primitive does not exist, then we should think about an irq > disable fallback for this local atomic operation. However, I would > prefer to let the cmpxchg_local primitive be bound to the "slow" > cmpxchg_acq and create something like _cmpxchg_local that would be > interrupt-safe, but not reentrant wrt NMIs. Ummm... That is what I did. See the included patch that you quoted. The measurements show that such a fallback is not preserving the performance on IA64. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
