This patch enables support in the driver for 64-bit DMA mask when running
in a POWER9 machine.

POWER9 supports either 32-bit or 64-bit DMA mask. However, our ASICs
support 48-bit DMA mask. To support 64-bit, the driver needs to add a
special configuration to the ASIC's PCIe controller.

The activation of this special configuration is done in case the PCI
parent device of Goya is a PHB4 PCI device of IBM.

Signed-off-by: Oded Gabbay <oded.gab...@gmail.com>
---
Changes in v2:
- Remove kernel module parameter and instead read the PCI device ID of the
  parent PCI bus. If it is PHB4, do the special configuration.
 
 drivers/misc/habanalabs/goya/goya.c  |  6 +++++-
 drivers/misc/habanalabs/habanalabs.h |  4 ++++
 drivers/misc/habanalabs/pci.c        | 23 ++++++++++++++++++++++-
 3 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/habanalabs/goya/goya.c 
b/drivers/misc/habanalabs/goya/goya.c
index e8b3a31d211f..71dc2341dd8c 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -472,7 +472,11 @@ static int goya_early_init(struct hl_device *hdev)
 
        prop->dram_pci_bar_size = pci_resource_len(pdev, DDR_BAR_ID);
 
-       rc = hl_pci_init(hdev, 48);
+       if (hl_pci_parent_is_phb4(hdev))
+               rc = hl_pci_init(hdev, 64);
+       else
+               rc = hl_pci_init(hdev, 48);
+
        if (rc)
                return rc;
 
diff --git a/drivers/misc/habanalabs/habanalabs.h 
b/drivers/misc/habanalabs/habanalabs.h
index 5e4a631b3d88..3ba94188884f 100644
--- a/drivers/misc/habanalabs/habanalabs.h
+++ b/drivers/misc/habanalabs/habanalabs.h
@@ -1208,6 +1208,8 @@ struct hl_device_reset_work {
  * @dma_mask: the dma mask that was set for this device
  * @in_debug: is device under debug. This, together with fd_open_cnt, enforces
  *            that only a single user is configuring the debug infrastructure.
+ * @power9_64bit_dma_enable: true to enable 64-bit DMA mask support. Relevant
+ *                           only to POWER9 machines.
  */
 struct hl_device {
        struct pci_dev                  *pdev;
@@ -1281,6 +1283,7 @@ struct hl_device {
        u8                              device_cpu_disabled;
        u8                              dma_mask;
        u8                              in_debug;
+       u8                              power9_64bit_dma_enable;
 
        /* Parameters for bring-up */
        u8                              mmu_enable;
@@ -1504,6 +1507,7 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 
sram_base_address,
 int hl_pci_init(struct hl_device *hdev, u8 dma_mask);
 void hl_pci_fini(struct hl_device *hdev);
 int hl_pci_set_dma_mask(struct hl_device *hdev, u8 dma_mask);
+bool hl_pci_parent_is_phb4(struct hl_device *hdev);
 
 long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr);
 void hl_set_frequency(struct hl_device *hdev, u32 pll_index, u64 freq);
diff --git a/drivers/misc/habanalabs/pci.c b/drivers/misc/habanalabs/pci.c
index c98d88c7a5c6..dcb737f9677c 100644
--- a/drivers/misc/habanalabs/pci.c
+++ b/drivers/misc/habanalabs/pci.c
@@ -10,6 +10,8 @@
 
 #include <linux/pci.h>
 
+#define PCI_DEVICE_ID_IBM_PHB4         0x04C1
+
 #define HL_PLDM_PCI_ELBI_TIMEOUT_MSEC  (HL_PCI_ELBI_TIMEOUT_MSEC * 10)
 
 /**
@@ -182,6 +184,20 @@ static void hl_pci_reset_link_through_bridge(struct 
hl_device *hdev)
        ssleep(3);
 }
 
+bool hl_pci_parent_is_phb4(struct hl_device *hdev)
+{
+       struct pci_dev *parent_port = hdev->pdev->bus->self;
+
+       if ((parent_port->vendor == PCI_VENDOR_ID_IBM) &&
+                       (parent_port->device == PCI_DEVICE_ID_IBM_PHB4)) {
+               hdev->power9_64bit_dma_enable = 1;
+               return true;
+       }
+
+       hdev->power9_64bit_dma_enable = 0;
+       return false;
+}
+
 /**
  * hl_pci_set_dram_bar_base() - Set DDR BAR to map specific device address.
  * @hdev: Pointer to hl_device structure.
@@ -283,7 +299,12 @@ int hl_pci_init_iatu(struct hl_device *hdev, u64 
sram_base_address,
                                upper_32_bits(host_phys_base_address));
        rc |= hl_pci_iatu_write(hdev, 0x010, lower_32_bits(host_phys_end_addr));
        rc |= hl_pci_iatu_write(hdev, 0x014, 0);
-       rc |= hl_pci_iatu_write(hdev, 0x018, 0);
+
+       if ((hdev->power9_64bit_dma_enable) && (hdev->dma_mask == 64))
+               rc |= hl_pci_iatu_write(hdev, 0x018, 0x08000000);
+       else
+               rc |= hl_pci_iatu_write(hdev, 0x018, 0);
+
        rc |= hl_pci_iatu_write(hdev, 0x020, upper_32_bits(host_phys_end_addr));
        /* Increase region size */
        rc |= hl_pci_iatu_write(hdev, 0x000, 0x00002000);
-- 
2.17.1

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