On Fri, Jun 07, 2019 at 03:00:34PM -0700, Fenghua Yu wrote: > umwait or tpause allows processor to enter a light-weight > power/performance optimized state (C0.1 state) or an improved > power/performance optimized state (C0.2 state) for a period > specified by the instruction or until the system time limit or until > a store to the monitored address range in umwait. > > IA32_UMWAIT_CONTROL MSR register allows kernel to enable/disable C0.2 > on the processor and set maximum time the processor can reside in > C0.1 or C0.2. > > By default C0.2 is enabled so the user wait instructions can enter the > C0.2 state to save more power with slower wakeup time. > > Default maximum umwait time is 100000 cycles. A later patch provides > a sysfs interface to adjust this value. > > Signed-off-by: Fenghua Yu <fenghua...@intel.com> > Reviewed-by: Ashok Raj <ashok....@intel.com> > Reviewed-by: Andy Lutomirski <l...@kernel.org> > --- > arch/x86/include/asm/msr-index.h | 4 +++ > arch/x86/power/Makefile | 1 + > arch/x86/power/umwait.c | 56 ++++++++++++++++++++++++++++++++
Why is this in power/, this isn't in the least related to suspend/hybernate. arch/x86/kernel/cpu/ might be a better place for instruction support.
