On Fri, May 10, 2019 at 10:23 AM Guillaume La Roque
<glaro...@baylibre.com> wrote:
>
> add drive-strength bank regiter and bit value for G12A SoC
>
> Signed-off-by: Guillaume La Roque <glaro...@baylibre.com>
Reviewed-by: Martin Blumenstingl<martin.blumensti...@googlemail.com>

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