Quoting [email protected] (2019-04-22 02:15:09) > From: Yuantian Tang <[email protected]> > > More PLL divider clocks are needed by clock consumer IP. So enlarge > the PLL divider array to accommodate more divider clocks. > > Signed-off-by: Yuantian Tang <[email protected]> > ---
Applied to clk-next
